ConstrainedReschedule
class ConstrainedReschedule(acquire_alignment=1, pulse_alignment=1)
Bases: qiskit.transpiler.basepasses.AnalysisPass
Rescheduler pass that updates node start times to conform to the hardware alignments.
This pass shifts DAG node start times previously scheduled with one of the scheduling passes, e.g. ASAPScheduleAnalysis or ALAPScheduleAnalysis, so that every instruction start time satisfies alignment constraints.
Examples
We assume executing the following circuit on a backend with 16 dt of acquire alignment.
┌───┐┌────────────────┐┌─┐
q_0: ┤ X ├┤ Delay(100[dt]) ├┤M├
└───┘└────────────────┘└╥┘
c: 1/════════════════════════╩═
0Note that delay of 100 dt induces a misalignment of 4 dt at the measurement. This pass appends an extra 12 dt time shift to the input circuit.
┌───┐┌────────────────┐┌─┐
q_0: ┤ X ├┤ Delay(112[dt]) ├┤M├
└───┘└────────────────┘└╥┘
c: 1/════════════════════════╩═
0Notes
Your backend may execute circuits violating these alignment constraints. However, you may obtain erroneous measurement result because of the untracked phase originating in the instruction misalignment.
Create new rescheduler pass.
The alignment values depend on the control electronics of your quantum processor.
Parameters
- acquire_alignment (
int) – Integer number representing the minimum time resolution to trigger acquisition instruction in units ofdt. - pulse_alignment (
int) – Integer number representing the minimum time resolution to trigger gate instruction in units ofdt.
Methods
name
ConstrainedReschedule.name()
Return the name of the pass.
run
ConstrainedReschedule.run(dag)
Run rescheduler.
This pass should perform rescheduling to satisfy:
- All DAGOpNode are placed at start time satisfying hardware alignment constraints.
- The end time of current does not overlap with the start time of successor nodes.
- Compiler directives are not necessary satisfying the constraints.
Assumptions:
- Topological order and absolute time order of DAGOpNode are consistent.
- All bits in either qargs or cargs associated with node synchronously start.
- Start time of qargs and cargs may different due to I/O latency.
Based on the configurations above, rescheduler pass takes following strategy.
-
Scan node from the beginning, i.e. from left of the circuit. The rescheduler
calls
node_start_timefrom the property set, and retrieves the scheduled start time of current node. -
If the start time of the node violates the alignment constraints,
the scheduler increases the start time until it satisfies the constraint.
-
Check overlap with successor nodes. If any overlap occurs, the rescheduler
recursively pushs the successor nodes backward towards the end of the wire. Note that shifted location doesn’t need to satisfy the constraints, thus it will be a minimum delay to resolve the overlap with the ancestor node.
-
Repeat 1-3 until the node at the end of the wire. This will resolve
all misalignment without creating overlap between the nodes.
Parameters
dag (DAGCircuit) – DAG circuit to be rescheduled with constraints.
Raises
TranspilerError – If circuit is not scheduled.
Attributes
is_analysis_pass
Check if the pass is an analysis pass.
If the pass is an AnalysisPass, that means that the pass can analyze the DAG and write the results of that analysis in the property set. Modifications on the DAG are not allowed by this kind of pass.
is_transformation_pass
Check if the pass is a transformation pass.
If the pass is a TransformationPass, that means that the pass can manipulate the DAG, but cannot modify the property set (but it can be read).