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FullAncillaAllocation

qiskit.transpiler.passes.FullAncillaAllocation(*args, **kwargs)GitHub(opens in a new tab)

Bases: AnalysisPass

Allocate all idle nodes from the coupling map or target as ancilla on the layout.

A pass for allocating all idle physical qubits (those that exist in coupling map or target but not the dag circuit) as ancilla. It will also choose new virtual qubits to correspond to those physical ancilla.

Note

This is an analysis pass, and only responsible for choosing physical ancilla locations and their corresponding virtual qubits. A separate transformation pass must add those virtual qubits to the circuit.

FullAncillaAllocation initializer.

Parameters

coupling_map (Union[CouplingMap, Target]) – directed graph representing a coupling map.


Attributes

is_analysis_pass

Check if the pass is an analysis pass.

If the pass is an AnalysisPass, that means that the pass can analyze the DAG and write the results of that analysis in the property set. Modifications on the DAG are not allowed by this kind of pass.

is_transformation_pass

Check if the pass is a transformation pass.

If the pass is a TransformationPass, that means that the pass can manipulate the DAG, but cannot modify the property set (but it can be read).


Methods

execute

execute(passmanager_ir, state, callback=None)

Execute optimization task for input Qiskit IR.

Parameters

Returns

Optimized Qiskit IR and state of the workflow.

Return type

tuple(opens in a new tab)[Any(opens in a new tab), qiskit.passmanager.compilation_status.PassManagerState]

name

name()

Name of the pass.

Return type

str(opens in a new tab)

run

run(dag)

Run the FullAncillaAllocation pass on dag.

Extend the layout with new (physical qubit, virtual qubit) pairs. The dag signals which virtual qubits are already in the circuit. This pass will allocate new virtual qubits such that no collision occurs (i.e. Layout bijectivity is preserved)

The coupling_map and layout together determine which physical qubits are free.

Parameters

dag (DAGCircuit) – circuit to analyze

Returns

returns the same dag circuit, unmodified

Return type

DAGCircuit

Raises

TranspilerError – If there is not layout in the property set or not set at init time.

update_status

update_status(state, run_state)

Update workflow status.

Parameters

  • state (PassManagerState) – Pass manager state to update.
  • run_state (RunState) – Completion status of current task.

Returns

Updated pass manager state.

Return type

PassManagerState

validate_layout

static validate_layout(layout_qubits, dag_qubits)

Checks if all the qregs in layout_qregs already exist in dag_qregs. Otherwise, raise.

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