Transpiler Passes
qiskit.transpiler.passes
Layout Selection (Placement)
SetLayout(*args, **kwargs) | Set the layout property to the given layout. |
TrivialLayout(*args, **kwargs) | Choose a Layout by assigning n circuit qubits to device qubits 0, .., n-1. |
DenseLayout(*args, **kwargs) | Choose a Layout by finding the most connected subset of qubits. |
NoiseAdaptiveLayout(*args, **kwargs) | Choose a noise-adaptive Layout based on current calibration data for the backend. |
SabreLayout(*args, **kwargs) | Choose a Layout via iterative bidirectional routing of the input circuit. |
CSPLayout(*args, **kwargs) | If possible, chooses a Layout as a CSP, using backtracking. |
VF2Layout(*args, **kwargs) | A pass for choosing a Layout of a circuit onto a Coupling graph, as a subgraph isomorphism problem, solved by VF2++. |
ApplyLayout(*args, **kwargs) | Transform a circuit with virtual qubits into a circuit with physical qubits. |
Layout2qDistance(*args, **kwargs) | Evaluate how good the layout selection was. |
EnlargeWithAncilla(*args, **kwargs) | Extend the dag with virtual qubits that are in layout but not in the circuit yet. |
FullAncillaAllocation(*args, **kwargs) | Allocate all idle nodes from the coupling map or target as ancilla on the layout. |
SabrePreLayout(*args, **kwargs) | Choose a starting layout to use for additional Sabre layout trials. |
Routing
BasicSwap(*args, **kwargs) | Map (with minimum effort) a DAGCircuit onto a coupling_map adding swap gates. |
LookaheadSwap(*args, **kwargs) | Map input circuit onto a backend topology via insertion of SWAPs. |
StochasticSwap(*args, **kwargs) | Map a DAGCircuit onto a coupling_map adding swap gates. |
SabreSwap(*args, **kwargs) | Map input circuit onto a backend topology via insertion of SWAPs. |
Commuting2qGateRouter(*args, **kwargs) | A class to swap route one or more commuting gates to the coupling map. |
Basis Change
BasisTranslator(*args, **kwargs) | Translates gates to a target basis by searching for a set of translations from a given EquivalenceLibrary. |
Decompose(*args, **kwargs) | Expand a gate in a circuit using its decomposition rules. |
TranslateParameterizedGates(*args, **kwargs) | Translate parameterized gates to a supported basis set. |
Unroll3qOrMore(*args, **kwargs) | Recursively expands 3q+ gates until the circuit only contains 2q or 1q gates. |
UnrollCustomDefinitions(*args, **kwargs) | Unrolls instructions with custom definitions. |
Unroller(*args, **kwargs) | Unroll a circuit to a given basis. |
Optimizations
Optimize1qGates(*args, **kwargs) | Optimize chains of single-qubit u1, u2, u3 gates by combining them into a single gate. |
Optimize1qGatesDecomposition(*args, **kwargs) | Optimize chains of single-qubit gates by combining them into a single gate. |
Collect1qRuns(*args, **kwargs) | Collect one-qubit subcircuits. |
Collect2qBlocks(*args, **kwargs) | Collect two-qubit subcircuits. |
CollectMultiQBlocks(*args, **kwargs) | Collect sequences of uninterrupted gates acting on groups of qubits. |
CollectLinearFunctions(*args, **kwargs) | Collect blocks of linear gates (CXGate and SwapGate gates) and replaces them by linear functions (LinearFunction). |
CollectCliffords(*args, **kwargs) | Collects blocks of Clifford gates and replaces them by a Clifford object. |
ConsolidateBlocks(*args, **kwargs) | Replace each block of consecutive gates by a single Unitary node. |
CXCancellation(*args, **kwargs) | Cancel back-to-back cx gates in dag. |
InverseCancellation(*args, **kwargs) | Cancel specific Gates which are inverses of each other when they occur back-to- back. |
CommutationAnalysis(*args, **kwargs) | Analysis pass to find commutation relations between DAG nodes. |
CommutativeCancellation(*args, **kwargs) | Cancel the redundant (self-adjoint) gates through commutation relations. |
CommutativeInverseCancellation(*args, **kwargs) | Cancel pairs of inverse gates exploiting commutation relations. |
Optimize1qGatesSimpleCommutation(*args, **kwargs) | Optimizes 1Q gate strings interrupted by 2Q gates by commuting the components and resynthesizing the results. |
RemoveDiagonalGatesBeforeMeasure(*args, **kwargs) | Remove diagonal gates (including diagonal 2Q gates) before a measurement. |
RemoveResetInZeroState(*args, **kwargs) | Remove reset gate when the qubit is in zero state. |
CrosstalkAdaptiveSchedule(*args, **kwargs) | Crosstalk mitigation through adaptive instruction scheduling. |
HoareOptimizer(*args, **kwargs) | This is a transpiler pass using Hoare logic circuit optimization. |
TemplateOptimization(*args, **kwargs) | Class for the template optimization pass. |
EchoRZXWeylDecomposition(*args, **kwargs) | Rewrite two-qubit gates using the Weyl decomposition. |
ResetAfterMeasureSimplification(*args, **kwargs) | This pass replaces reset after measure with a conditional X gate. |
OptimizeCliffords(*args, **kwargs) | Combine consecutive Cliffords over the same qubits. |
NormalizeRXAngle(*args, **kwargs) | Normalize theta parameter of RXGate instruction. |
Calibration
PulseGates(*args, **kwargs) | Pulse gate adding pass. |
RZXCalibrationBuilder(*args, **kwargs) | Creates calibrations for RZXGate(theta) by stretching and compressing Gaussian square pulses in the CX gate. |
RZXCalibrationBuilderNoEcho(*args, **kwargs) | Creates calibrations for RZXGate(theta) by stretching and compressing Gaussian square pulses in the CX gate. |
RXCalibrationBuilder(*args, **kwargs) | Add single-pulse RX calibrations that are bootstrapped from the SX calibration. |
Scheduling
TimeUnitConversion(*args, **kwargs) | Choose a time unit to be used in the following time-aware passes, and make all circuit time units consistent with that. |
ALAPScheduleAnalysis(*args, **kwargs) | ALAP Scheduling pass, which schedules the stop time of instructions as late as possible. |
ASAPScheduleAnalysis(*args, **kwargs) | ASAP Scheduling pass, which schedules the start time of instructions as early as possible. |
PadDynamicalDecoupling(*args, **kwargs) | Dynamical decoupling insertion pass. |
PadDelay(*args, **kwargs) | Padding idle time with Delay instructions. |
ConstrainedReschedule(*args, **kwargs) | Rescheduler pass that updates node start times to conform to the hardware alignments. |
ValidatePulseGates(*args, **kwargs) | Check custom gate length. |
InstructionDurationCheck(*args, **kwargs) | Duration validation pass for reschedule. |
SetIOLatency(*args, **kwargs) | Set IOLatency information to the input circuit. |
ALAPSchedule(*args, **kwargs) | ALAP Scheduling pass, which schedules the stop time of instructions as late as possible. |
ASAPSchedule(*args, **kwargs) | ASAP Scheduling pass, which schedules the start time of instructions as early as possible.. |
DynamicalDecoupling(*args, **kwargs) | Dynamical decoupling insertion pass. |
AlignMeasures(*args, **kwargs) | Measurement alignment. |
Circuit Analysis
Width(*args, **kwargs) | Calculate the width of a DAG circuit. |
Depth(*args, **kwargs) | Calculate the depth of a DAG circuit. |
Size(*args, **kwargs) | Calculate the size of a DAG circuit. |
CountOps(*args, **kwargs) | Count the operations in a DAG circuit. |
CountOpsLongestPath(*args, **kwargs) | Count the operations on the longest path in a DAGCircuit. |
NumTensorFactors(*args, **kwargs) | Calculate the number of tensor factors of a DAG circuit. |
DAGLongestPath(*args, **kwargs) | Return the longest path in a DAGCircuit as a list of DAGOpNodes, DAGInNodes, and DAGOutNodes. |
Synthesis
UnitarySynthesis(*args, **kwargs) | Synthesize gates according to their basis gates. |
LinearFunctionsSynthesis(*args, **kwargs) | DEPRECATED: Synthesize linear functions. |
LinearFunctionsToPermutations(*args, **kwargs) | Promotes linear functions to permutations when possible. |
HighLevelSynthesis(*args, **kwargs) | Synthesize higher-level objects and unroll custom definitions. |
SolovayKitaev(*args, **kwargs) | Approximately decompose 1q gates to a discrete basis using the Solovay-Kitaev algorithm. |
SolovayKitaevSynthesis() | A Solovay-Kitaev Qiskit unitary synthesis plugin. |
AQCSynthesisPlugin() | An AQC-based Qiskit unitary synthesis plugin. |
Post Layout (Post transpile qubit selection)
VF2PostLayout(*args, **kwargs) | A pass for choosing a Layout after transpilation of a circuit onto a Coupling graph, as a subgraph isomorphism problem, solved by VF2++. |
Additional Passes
CheckMap(*args, **kwargs) | Check if a DAG circuit is already mapped to a coupling map. |
CheckGateDirection(*args, **kwargs) | Check if the two-qubit gates follow the right direction with respect to the coupling map. |
GateDirection(*args, **kwargs) | Modify asymmetric gates to match the hardware coupling direction. |
MergeAdjacentBarriers(*args, **kwargs) | Return a circuit with any adjacent barriers merged together. |
RemoveBarriers(*args, **kwargs) | Return a circuit with any barrier removed. |
BarrierBeforeFinalMeasurements(*args, **kwargs) | Add a barrier before final measurements. |
RemoveFinalMeasurements(*args, **kwargs) | Remove final measurements and barriers at the end of a circuit. |
DAGFixedPoint(*args, **kwargs) | Check if the DAG has reached a fixed point. |
FixedPoint(*args, **kwargs) | Check if a property reached a fixed point. |
MinimumPoint(*args, **kwargs) | Check if the DAG has reached a relative semi-stable point over previous runs |
ContainsInstruction(*args, **kwargs) | An analysis pass to detect if the DAG contains a specific instruction. |
GatesInBasis(*args, **kwargs) | Check if all gates in a DAG are in a given set of gates |
ConvertConditionsToIfOps(*args, **kwargs) | Convert instructions whose condition attribute is set to a non-None value into the equivalent single-statement IfElseBlock. |
UnrollForLoops(*args, **kwargs) | UnrollForLoops transpilation pass unrolls for-loops when possible. |
Was this page helpful?
Report a bug or request content on GitHub.