Transpiler Passes
qiskit.transpiler.passes
Layout Selection (Placement)
SetLayout (*args, **kwargs) | Set the layout property to the given layout. |
TrivialLayout (*args, **kwargs) | Choose a Layout by assigning n circuit qubits to device qubits 0, .., n-1 . |
DenseLayout (*args, **kwargs) | Choose a Layout by finding the most connected subset of qubits. |
NoiseAdaptiveLayout (*args, **kwargs) | Choose a noise-adaptive Layout based on current calibration data for the backend. |
SabreLayout (*args, **kwargs) | Choose a Layout via iterative bidirectional routing of the input circuit. |
CSPLayout (*args, **kwargs) | If possible, chooses a Layout as a CSP, using backtracking. |
VF2Layout (*args, **kwargs) | A pass for choosing a Layout of a circuit onto a Coupling graph, as a a subgraph isomorphism problem, solved by VF2++. |
ApplyLayout (*args, **kwargs) | Transform a circuit with virtual qubits into a circuit with physical qubits. |
Layout2qDistance (*args, **kwargs) | Evaluate how good the layout selection was. |
EnlargeWithAncilla (*args, **kwargs) | Extend the dag with virtual qubits that are in layout but not in the circuit yet. |
FullAncillaAllocation (*args, **kwargs) | Allocate all idle nodes from the coupling map as ancilla on the layout. |
Routing
BasicSwap (*args, **kwargs) | Map (with minimum effort) a DAGCircuit onto a coupling_map adding swap gates. |
LookaheadSwap (*args, **kwargs) | Map input circuit onto a backend topology via insertion of SWAPs. |
StochasticSwap (*args, **kwargs) | Map a DAGCircuit onto a coupling_map adding swap gates. |
SabreSwap (*args, **kwargs) | Map input circuit onto a backend topology via insertion of SWAPs. |
BIPMapping (*args, **kwargs) | Map a DAGCircuit onto a given coupling_map , allocating qubits and adding swap gates. |
Basis Change
Unroller (*args, **kwargs) | Unroll a circuit to a given basis. |
Unroll3qOrMore (*args, **kwargs) | Recursively expands 3q+ gates until the circuit only contains 2q or 1q gates. |
Decompose ([gate, gates_to_decompose]) | Expand a gate in a circuit using its decomposition rules. |
UnrollCustomDefinitions (*args, **kwargs) | Unrolls instructions with custom definitions. |
BasisTranslator (*args, **kwargs) | Translates gates to a target basis by searching for a set of translations from a given EquivalenceLibrary. |
Optimizations
Optimize1qGates (*args, **kwargs) | Optimize chains of single-qubit u1, u2, u3 gates by combining them into a single gate. |
Optimize1qGatesDecomposition (*args, **kwargs) | Optimize chains of single-qubit gates by combining them into a single gate. |
Collect1qRuns (*args, **kwargs) | Collect one-qubit subcircuits. |
Collect2qBlocks (*args, **kwargs) | Collect two-qubit subcircuits. |
CollectMultiQBlocks (*args, **kwargs) | Collect sequences of uninterrupted gates acting on groups of qubits. |
CollectLinearFunctions (*args, **kwargs) | Collect blocks of linear gates (CXGate and SwapGate gates) and replaces them by linear functions (LinearFunction ). |
ConsolidateBlocks (*args, **kwargs) | Replace each block of consecutive gates by a single Unitary node. |
CXCancellation (*args, **kwargs) | Cancel back-to-back cx gates in dag. |
InverseCancellation (gates_to_cancel) | Cancel specific Gates which are inverses of each other when they occur back-to- back. |
CommutationAnalysis (*args, **kwargs) | Analysis pass to find commutation relations between DAG nodes. |
CommutativeCancellation (*args, **kwargs) | Cancel the redundant (self-adjoint) gates through commutation relations. |
Optimize1qGatesSimpleCommutation (*args, **kwargs) | Optimizes 1Q gate strings interrupted by 2Q gates by commuting the components and re- synthesizing the results. |
RemoveDiagonalGatesBeforeMeasure (*args, **kwargs) | Remove diagonal gates (including diagonal 2Q gates) before a measurement. |
RemoveResetInZeroState (*args, **kwargs) | Remove reset gate when the qubit is in zero state. |
CrosstalkAdaptiveSchedule (*args, **kwargs) | Crosstalk mitigation through adaptive instruction scheduling. |
HoareOptimizer (*args, **kwargs) | This is a transpiler pass using Hoare logic circuit optimization. |
TemplateOptimization (*args, **kwargs) | Class for the template optimization pass. |
EchoRZXWeylDecomposition (*args, **kwargs) | Rewrite two-qubit gates using the Weyl decomposition. |
Calibration
PulseGates (inst_map) | Pulse gate adding pass. |
RZXCalibrationBuilder ([backend, …]) | Creates calibrations for RZXGate(theta) by stretching and compressing Gaussian square pulses in the CX gate. |
RZXCalibrationBuilderNoEcho ([backend, …]) | Creates calibrations for RZXGate(theta) by stretching and compressing Gaussian square pulses in the CX gate. |
Scheduling
TimeUnitConversion (inst_durations) | Choose a time unit to be used in the following time-aware passes, and make all circuit time units consistent with that. |
ALAPScheduleAnalysis (durations) | ALAP Scheduling pass, which schedules the stop time of instructions as late as possible. |
ASAPScheduleAnalysis (durations) | ASAP Scheduling pass, which schedules the start time of instructions as early as possible.. |
PadDynamicalDecoupling (durations, dd_sequence) | Dynamical decoupling insertion pass. |
PadDelay ([fill_very_end]) | Padding idle time with Delay instructions. |
ConstrainedReschedule ([acquire_alignment, …]) | Rescheduler pass that updates node start times to conform to the hardware alignments. |
AlignMeasures ([alignment]) | Measurement alignment. |
ValidatePulseGates ([granularity, min_length]) | Check custom gate length. |
InstructionDurationCheck ([…]) | Duration validation pass for reschedule. |
SetIOLatency ([clbit_write_latency, …]) | Set IOLatency information to the input circuit. |
ALAPSchedule (*args, **kwargs) | ALAP Scheduling pass, which schedules the stop time of instructions as late as possible. |
ASAPSchedule (*args, **kwargs) | ASAP Scheduling pass, which schedules the start time of instructions as early as possible.. |
DynamicalDecoupling (*args, **kwargs) | Dynamical decoupling insertion pass. |
Circuit Analysis
Width (*args, **kwargs) | Calculate the width of a DAG circuit. |
Depth (*args, **kwargs) | Calculate the depth of a DAG circuit. |
Size (*args, **kwargs) | Calculate the size of a DAG circuit. |
CountOps (*args, **kwargs) | Count the operations in a DAG circuit. |
CountOpsLongestPath (*args, **kwargs) | Count the operations on the longest path in a DAGcircuit. |
NumTensorFactors (*args, **kwargs) | Calculate the number of tensor factors of a DAG circuit. |
DAGLongestPath (*args, **kwargs) | Return the longest path in a DAGcircuit as a list of DAGOpNodes, DAGInNodes, and DAGOutNodes. |
Synthesis
UnitarySynthesis ([basis_gates, …]) | Synthesize gates according to their basis gates. |
LinearFunctionsSynthesis (*args, **kwargs) | Synthesize linear functions. |
LinearFunctionsToPermutations (*args, **kwargs) | Promotes linear functions to permutations when possible. |
Additional Passes
CheckMap (*args, **kwargs) | Check if a DAG circuit is already mapped to a coupling map. |
CheckCXDirection (*args, **kwargs) | Deprecated: use qiskit.transpiler.passes.CheckGateDirection pass instead. |
CheckGateDirection (*args, **kwargs) | Check if the two-qubit gates follow the right direction with respect to the coupling map. |
CXDirection (*args, **kwargs) | Deprecated: use qiskit.transpiler.passes.GateDirection pass instead. |
GateDirection (*args, **kwargs) | Modify asymmetric gates to match the hardware coupling direction. |
MergeAdjacentBarriers (*args, **kwargs) | Return a circuit with any adjacent barriers merged together. |
RemoveBarriers (*args, **kwargs) | Return a circuit with any barrier removed. |
BarrierBeforeFinalMeasurements (*args, **kwargs) | Add a barrier before final measurements. |
RemoveFinalMeasurements (*args, **kwargs) | Remove final measurements and barriers at the end of a circuit. |
DAGFixedPoint (*args, **kwargs) | Check if the DAG has reached a fixed point. |
FixedPoint (*args, **kwargs) | Check if a property reached a fixed point. |
ContainsInstruction (*args, **kwargs) | An analysis pass to detect if the DAG contains a specific instruction. |
GatesInBasis (*args, **kwargs) | Check if all gates in a DAG are in a given set of gates |
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